• [Feb 2024] Serving as design contest co-chair for ISLPED 2024 (Aug 5-7) to be held in California, USA. Link:
  • [Jan 2024] Attended VLSI design conference (VLSID) 2024 in Kolkata. Met many eminent researchers, industry experts, and old friends.



  • [Nov 2022] Elevated to the grade of Senior Member of IEEE.
  • [Sep 2022] Startup research grant (SRG) project on shared resource management approved by SERB, DST. Amount: 20.26L
  • [Apr 2022] Research paper titled "CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5D, and 3D Processor-Memory Systems" accepted for publication in ACM Transactions on Architecture and Code Optimization (TACO). Authors are: Lokesh Siddhu, Rajesh Kedia, Shailja Pandey, Martin Rapp, Anuj Pathania, Joerg Henkel, and Preeti Ranjan Panda. This was a collaborative work between IIT Delhi, IIT Hyderabad, KIT Germany, and UvA Amsterdam.
  • [Mar 2022] Delivered an invited talk titled "Hot is a cool opportunity: Challenges and approaches towards thermal management in 3D architectures" at Texas Instruments India Pvt. Ltd. as a part of their annual internal conference. It was a proud feeling to present to ex-colleagues and a nice interaction with 50+ participants.
  • [Mar 2022] Attended VLSID 2022 and DATE 2022 in online mode. Lot of interesting presentations and interactions.
  • [Feb 2022] CoreMemDTM receives best paper nomination during DATE 2022, which indicate it to be among top-25 papers from 736 reviewed papers and 182 accepted papers.


  • [Dec 2021] Rajesh Kedia joins IIT Hyderabad as an Assistant Professor in the department of Computer Science and Engineering.
  • [Nov 2021] Research paper titled "CoreMemDTM: Integrated Processor Core and 3D Memory Dynamic Thermal Management for Improved Performance" accepted as a regular paper in DATE 2022. Authors: Lokesh Siddhu, Rajesh Kedia, and Preeti Ranjan Panda.
  • [Oct 2021] Research article titled "FN-CACTI: Advanced CACTI for FinFET and NC-FinFET Technologies" accepted as a regular paper in IEEE TVLSI. Authors: Divya Praneetha Ravipati, Rajesh Kedia, Victor M. van Santen, Joerg Henkel, Preeti Ranjan Panda, and Hussam Amrouch. This work was a collaboration between IIT Delhi, University of Stuttgart Germany, and KIT Germany.
  • [Mar 2021] A 4-min. short video on our work related to design space exploration for systems with DNN accelerators released by IITD CSE. Please have a look and share feedback.


  • [Oct 2020] Research paper titled "INFER: INterFerence-aware Estimation of Runtime for Concurrent CNN Execution on DPUs" accepted as a short paper in FPT 2020. Authors: Shikha Goel, Rajesh Kedia, Rijurekha Sen and M. Balakrishnan.
  • [Oct 2020] Successfully defended Ph.D. thesis in online mode. More than 25 participants joined.
  • [Aug 2020] Research article titled "Leakage Aware Dynamic Thermal Management of 3D Memories" accepted for publication in ACM Transactions on Design Automation of Electronic Systems (TODAES). Authors: Lokesh Siddhu, Rajesh Kedia, and Preeti Ranjan Panda.
  • [Aug 2020] Research article titled "Design Space Exploration of FPGA Based System with Multiple DNN Accelerators" accepted for publication in IEEE Embedded Systems Letters (ESL)". Authors: Rajesh Kedia, Shikha Goel, M. Balakrishnan, Kolin Paul, and Rijurekha Sen.
  • [Apr 2020] Selected to participate in the 8th Heidelberg Laureate forum in September 2021.
  • [Feb 2020] Visited MNIT Jaipur (as an alumni) on 15-Feb. to attend the ECE department research conclave and industry day and gave a short talk titled "VLSI and Hardware Research in the Era of Machine Learning". It was a nostalgic feeling to visit alma mater after so many years and meeting the teachers. The slides can be found here.
  • [Jan 2020] Attended VLSID 2020 conference in Bengaluru. Lots of interesting talks and interactions. A short summary of my experience.


  • [Oct 2019] Attended ESWEEK 2019 conference in New York and presented the paper on DSE for CAES. Met many eminent researchers in embedded systems.
  • [Aug 2019] Attended Euromicro DSD conference 2019 in Greece and presented the paper on GRanDE.
  • [Jul 2019] Work-in-Progress research paper titled "A case for design space exploration of context-aware adaptive embedded systems" accepted in CODES+ISSS 2019, New York, USA. Authors: Rajesh Kedia, M. Balakrishnan and Kolin Paul.
  • [Jun 2019] Research paper titled "GRanDE: Graphical representation and design space exploration of embedded systems" accepted as regular paper in Euromicro DSD 2019, Greece. Authors: Rajesh Kedia, M. Balakrishnan and Kolin Paul.
  • [Jan 2019] Attended VLSI Design conference 2019 at New Delhi and presented the paper on MAVI.


  • [Oct 2018] Research paper titled "MAVI: Mobility assistant for visually impaired using deep learning and cloud services" accepted in VLSID 2019, New Delhi. Authors: Rajesh Kedia, Anupam Sobti, Mukund, Sarvesh, Akhil, Anil, Chrystle, Richa, M. Balakrishnan and Chetan Arora.
  • [May 2018] Attended GIAN course by Prof. Sanjoy Baruah on mixed criticality real time systems at IIT Guwahati.
  • [Jan 2018] Outstanding TA award for the course on Digital Logic and System Design in Sem I, 2017-18.
  • [Jan 2018] Attended VLSID 2018 at Pune. It was a nice experience interacting with eminent researchers and hear their talks. My research work was presented by my supervisor and attended by more than 60 participants. A short summary of my experience.


  • [Dec 2017] Planned and moderated a panel discussion on "Career options after a Ph.D." during Annual Ph.D. Symposium at IIT Delhi. Look at key takeaways here.
  • [Oct 2017] Will be a part of tutorial presentation at VLSID 2018 by Prof. M. Balakrishnan.
  • [Aug 2017] Outstanding TA award for the course on Computer Architecture in Sem II, 2016-17.
  • [Jan 2017] Attended VLSI Design conference 2017 at Hyderabad and presented the paper on MAVI.


  • [Dec 2016] Successfully organized annual PhD Symposium of IITD CSE/SIT departments.
  • [Oct 2016] Attended MEMOCODE 2016 at IIT Kanpur.
  • [Oct 2016] Research paper titled "MAVI: An embedded device to assist mobility of visually impaired" accepted in VLSID 2017, Hyderabad. Authors: Rajesh Kedia, Yoosuf K K, Pappireddy Dedeepya, Munib Fazal, Chetan Arora, and M. Balakrishnan.
  • [Aug 2016] Outstanding TA award for the course on Operating Systems in Sem II, 2015-16.
  • [Aug 2016] Honorable mention for TA duties for course on SLDM in Sem I, 2015-16.

2015 and Earlier

  • Gold medal for securing first position in ECE department at MNIT Jaipur during B.Tech.
  • Awarded merit bonus multiple times at Texas Instruments India.
  • Best project award during summer internship at IIT Delhi undertaken during B.Tech.
  • Merit certificate by CBSE for securing 100/100 in Maths in Class X.