I am an Assistant Professor of Computer Science and Engineering at IIT Hyderabad. My key research interests are in the domain of computer architecture, embedded systems, and VLSI design automation.
I completed my Ph.D. from IIT Delhi and was advised by Prof. M. Balakrishnan and Prof. Kolin Paul. I was a recipient of Visvesvaraya Ph.D. fellowship supported by MeitY.I completed my B.Tech. in ECE from MNIT Jaipur in 2006 and subsequently worked at Texas Instruments in Bangalore for 8+ years in various VLSI design activities - design for testability, verification, specification, and firmware development.
Open positions
We have open positions for research staff, PhD students, and M.Tech. research students. Our work requires the understanding of following concepts: Computer architecture, system-on-chip, and digital logic. Apart from this, a basic comfort with using Linux systems is desired.Please send an email if you are interested to explore further.
Teaching
| Session | Course | Credits | Co-instructor |
|---|---|---|---|
| Jan-May 2025 | Hardware architecture for deep learning | 3 | - |
| Oct-Nov 2024 | Productivity tools for IC Design | 1 | - |
| Aug-Nov 2024 | Computer Architecture | 4 | - |
| Jan-May 2024 | Software development fundamentals | 3 | Ramakrishna Upadrasta |
| Jan-May 2024 | Hardware architecture for deep learning | 3 | Shirshendu Das |
| Oct-Nov 2023 | Hardware and Machine Learning | 1 | - |
| July-Nov 2023 | Advanced Computer Architecture | 3 | Shirshendu Das |
| Aug-Nov 2023 | Computer Architecture | 3 | - |
| Jan-May 2023 | Operating Systems - II | 3 | Sathya Peri |
| Oct-Nov 2022 | Hardware and Machine Learning | 1 | - |
| Aug-Nov 2022 | Computer Architecture | 3 | - |
| Jan-May 2022 | Operating Systems - II | 3 | Sathya Peri |
Student Mentoring
Ph.D. students
- Jayalakshmi Yeruva (jointly with Dr. Ramakrishna), joined July 2023
- Lakshay Arora, joined July 2024
M.Tech. students
- Taufique Shaikh
- Prathmesh Shalu - Task mapping
- Neha Bhargava (jointly with Dr. Ramakrishna) - RISC-V
- Girish Makarand Thatte - Shared resource analysis (graduated: June 2024)
- Venkatesh Subhash Mangnale - Thermal management (graduated: June 2024)
- Yogesh Ahirwar - Thermal management (graduated: June 2023)
- Praveen Vishwakarma - Thermal management (graduated: June 2023)
Research
I am interested in research areas related to computer architecture, embedded systems, and VLSI design automation. The domain is quite broad and my current focus is in efficient thermal management of processors and memories, efficient management of shared resources in a system, and FPGA based accelerator design.
Open source releases
- CoMeT (Core and Memory Thermal Simulator): A first-ever integrated tool for thermal simulation of core and memory in a computing system, built over Sniper architecture simulator. Supports various integration of core and memory like 2D, 2.5D, and 3D. Many other useful features are also included. [Link to repository]
Technical Service
- Reviewer for leading conferences and journals like ASPDAC, DAC, IEEE ESL, CODES+ISSS, IEEE TCAD, ACM TECS
List of Publications
Recent list
- Shikha Goel, Rajesh Kedia, Rijurekha Sen, and M. Balakrishnan, "EXPRESS: A Framework for Execution Time Prediction of Concurrent CNNs on Xilinx DPU Accelerator", ACM TECS, Sep 2024. [Link to paper]
- M A Muneeb and Rajesh Kedia, "Characterizing CNN Throughput and Energy Under Multi-threaded and Multi-accelerator Execution", CODES+ISSS 2024/IEEE ESL. [Link to paper]
- Shikha Goel, Rajesh Kedia, Rijurekha Sen, and M. Balakrishnan, "EXPRESS: CNN EXecution Time PREdiction for DPU DeSign Space Exploration", International Conference on Field-Programmable Technology (ICFPT), 2022 (poster). [Link to paper]
- Lokesh Siddhu, Rajesh Kedia, Shailja Pandey, Martin Rapp, Anuj Pathania, Joerg Henkel, and Preeti Ranjan Panda, "CoMeT: An Integrated Interval Thermal Simulation Toolchain for 2D, 2.5D, and 3D Processor-Memory Systems", ACM Transactions on Architecture and Code Optimization (TACO), April 2022. [Link to paper]
- Lokesh Siddhu, Rajesh Kedia, and Preeti Ranjan Panda. "CoreMemDTM: Integrated Processor Core and 3D Memory Dynamic Thermal Management for Improved Performance". In Design Automation and Test in Europe (DATE) 2022. [Link to paper].
Full list of publications is available here
Work Experience
| Organization | Period | Summary of work |
|---|---|---|
| Khosla School of IT, IIT Delhi | Jul 2020 - Dec 2021 | Research work in thermal management of computer systems, modeling of caches, and shared resource management. I worked with Prof. Preeti Ranjan Panda during this period. |
| Texas Instruments India Pvt. Ltd. | Jul 2006 - Dec 2014 | Worked as a part of Microcontroller (MCU) design team: Design for Test (DfT), Functional Verification, Architecture Definition. |
Others/ External Links
Contact Details
Email: rkedia@cse.iith.ac.in
Office:
CS-406, Dept. of Computer Science and Engg.,
IIT Hyderabad, Kandi,
Sangareddy, Telangana - 502284.
Credits
Template borrowed from Styleshout
