Digital System Design (EE 204)

       Dr. Raji (home)

Course Content          Text Books          Evaluation

 

Course Content

·Representation of Data:

    Number systems and codes, Representation of tin and signed integers, Fixed-point representation of real  

    numbers, Floating –point representation of real numbers, Representation of character data, Representation of    

    signals.

·Switching Theory:

    Laws of Boolean algebra, Theorems of Boolean algebra, switching functions, Methods for specification of  

    switching functions - Truth table and Algebraic forms, Realization of functions using logic gates.

·Digital Logic Elements:

    Electronic logic gates, Positive and negative logic, families -TTL, ECL and CMOS, Realization of logic gates.

·Simplification of Boolean Expressions and Functions:

     Algebraic methods, Canonical forms of Boolean functions, Minimization of functions using Karnaugh maps,

    minimization of functions using Quine-McClusky method.

 

·Design of Combinational Logic Circuits:

 

    Gate level design of Small Scale Integration (SSI) circuits, Modular combinational logic elements-Decoders,

    Encoders, Priority encoders, Multiplexers and Demultiplexers.

·Design of Integer Arithmetic Circuits using Combinational Logic:

    Integer adders -Ripple carry adder and Carry look ahead adder, Integer subtractors using adders, Unsigned

    integer multipliers- Combinational array circuits, Signed integer multipliers Booth's coding, Bit-pair recoding, Carry

    save addition and Wallace tree multiplier, Signed integer division circuits - Combinational array circuits, Complexity and propagation delay analysis of circuits.

·Design of Combinational Circuits using Programmable Logic Devices (PLDs):

    Programmable Read Only Memories (PROMs), Programmable Logic Arrays (PLAs), Programmable Array Logic (PAL)

    devices, Design of multiple output circuits using PLDs

·Sequential Circuit Elements:

    Latches -RS latch and JK latch, Flip-flops-RS, JK, T and D flip flops, Master-slave flip flops, Edge-triggered flip-flops

·Analysis and Design of Synchronous Sequential Circuits:

    Models of sequential circuits - Moore machine and Mealy machine, Flip-flops - Characteristic table, Characteristic equation and Excitation table, Analysis of sequential circuits- Flip-flop input expressions, Next state equations, Next state maps, State table and State transition diagram, Design of sequential circuits - State transition diagram, State table, Next state maps, Output maps, Expressions for flip-flop inputs and Expressions for circuit outputs, Modular sequential logic circuits- Shift registers, Registers, Counters and Random access memories, Design using programmable logic sequencers (PLSs)

·Design of Arithmetic Circuits using Sequential Logic:

    Serial adder for integers, Unsigned integer multiplier, Unsigned integer division circuits, Signed integer division, Floating-pint adder / subtractor - Design of control circuit, Floating - point multiplier.

·Sequence detection and state reduction methods:

    w:st="on"Moore and Mealy state graphs for sequence detection, Methods for reduction of state tables, Methods for state assignment

·VLSI Realization of Digital Systems:

    Field-Programmable Logic Arrays (FPLAs) and Logic Cell Arrays (LCAs)

 

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Text Books

  1. C. H. Roth, Fundamental s of Logic design, Jaico Publishers, 1998.

  2. V. P. Nelson, H. T. Nagle, E. D. Caroll and J. D. Irwin, Digital Logic Circuit Analysis and Design, Prentice Hall International, 1995

References

  1. S. Brown and Z Vranesic, Fundamentals of Logic Design with VHDL Design, Tata McGraw-Hill, 2000

  2. F.J. Hill and G.R.Peterson, Computer Aided Logical Design with Emphasis on

  3. VLSI, John Wiley & Sons, 1993

  4. C. Hamacher, Z. Vranesic and S. Zaky, Computer Organization, McGraw-Hill, 2002.

  5. J.P. Hyes, Computer Architecture and Organization, McGraw-Hill, 1998.

  6. Herbert Taub and Donald Schilling, Digital Integrated Circuits, McGraw Hill.

  7. Neil H.E. Weste and Kamran Eshraghian, Principles of CMOS VLSI Design.

  8. Richard F.Tinder, Engineering Design, Academic Press

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Evaluation:

     Quiz 1: 20 Marks

     Quiz 2: 20 Marks

     Tutorials and Computer Assignment: 10 marks

     End semester: 50 Marks